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[VHDL-FPGA-Verilog] Nios

Description: Altera公司开发的用于其FPGA的的Nios软核入门介绍-Developed by Altera for its FPGA of the Nios soft-core entry-Introduction
Platform: | Size: 1537024 | Author: liukun | Hits:

[ARM-PowerPC-ColdFire-MIPS] Altera

Description: 利用Nios Ⅱ软核处理器，以Altera公司的UP3开发板为硬件平台，以Quartus II、Quartus ID为软件开发平台，设计一个电子钟，实现下列系统功能： （1）在液晶屏上显示时间、日期、状态提示； （2）利用4个按键对时间（时分秒）、日期（年月日）进行设置； （3）利用一个LED灯指示当前设置状态；-The use of soft-core processor, Nios Ⅱ to Altera s UP3 development board as the hardware platform to Quartus II, Quartus ID for software development platform, design a clock
Platform: | Size: 6460416 | Author: Emma | Hits:

[Embeded-SCM Develop] netsupervisor

Description: 基于NIOSii的网络监控系统设计，altera设计大赛获奖作品-NIOSii based on the network monitoring system design, altera Design Contest winning entries
Platform: | Size: 178176 | Author: lyc84122 | Hits:

[VHDL-FPGA-Verilog] 61EDA_C1202

Description: Altera大学计划程序包，基于Nios II的源代码-Altera University program package, based on the Nios II source code
Platform: | Size: 1742848 | Author: zw | Hits:

[Other] make_interrupt_vector

Description: altera NIOS软核系统 中断矢量使用例子，基于C语言-altera NIOS soft-core system interrupt vector to use examples, based on the C language
Platform: | Size: 3072 | Author: 黄杰 | Hits:

[Embeded-SCM Develop] sls_sram_16_bit

Description: altera NIOS软核系统中构建外接SRAM接口的例子-altera NIOS soft-core system to build external SRAM interface example
Platform: | Size: 3072 | Author: 黄杰 | Hits:

[Software Engineering] NiosII_implementation_in_CCD_Camera_for_Pi_of_the_

Description: The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, current implementation of firmware [VHDL] inside the FPGA and the role of external 8051 microcontroller is briefly described. The main goal of the presented work is to get rid of the external microcontroller and to design new system with Nios II processor built inside FPGA chip. Constraints for implementing the design into the existing camera boards are discussed. New possibilities offered by a larger FPGA for next generation of cameras are considered.-The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, current implementation of firmware [VHDL] inside the FPGA and the role of external 8051 microcontroller is briefly described. The main goal of the presented work is to get rid of the external microcontroller and to design new system with Nios II processor built inside FPGA chip. Constraints for implementing the design into the existing camera boards are discussed. New possibilities offered by a larger FPGA for next generation of cameras are considered.
Platform: | Size: 1427456 | Author: Francis Wu | Hits:

[Other] ds_nios_uart

Description: altera nios uart en文档，官方的最底层的驱动开发-altera nios uart
Platform: | Size: 196608 | Author: sunlichao | Hits:

[VHDL-FPGA-Verilog] MTDB_SYSTEM_CD_V1.0

Description: ALTERA Nios II Embedded Evaluation Kit开发板制造商(terasic)提供的多媒体显示板（Terasic Multimedia Touch Panel Daughter Board (MTDB)）扩展开发包。 里为有两个开源的例子 1.MTDB_SD_Card_Audio,从SD卡中读取WAV文件然后通过DA播放，这个对不SD Card的初学者非常的有用，可以知道使用FPGA SPI来读写SD CARD。 2.MTDB_Systhesizer,使用FPGA来做电子琴，要用FPGA来做合成器的看这个。 国内部分地区的网络对TERASIC封杀，原因不明，这个包是使用代理下载的，非常不容易。-ALTERA Nios II Embedded Evaluation Kit development board manufacturers (terasic) to provide multi-media display boards (Terasic Multimedia Touch Panel Daughter Board (MTDB)) the expansion of the development package. Where for example there are two open source 1.MTDB_SD_Card_Audio, from the SD card and then read the WAV file to play through the DA, the SD Card for the beginner is not very useful, we can see that the use of FPGA SPI read and write to SD CARD. 2.MTDB_Systhesizer, the use of FPGA as organ, synthesizer use FPGA to do the look at this. Internal parts of the network to block TERASIC for reasons unknown, the package is downloaded using a proxy, is not easy.
Platform: | Size: 27464704 | Author: myfingerhurt | Hits:

[VHDL-FPGA-Verilog] niox

Description: Open source and clean clone of Altera NIOS-II Soft Processor. Not completed but some test do run ok.
Platform: | Size: 17408 | Author: Antti Lukats | Hits:

[VHDL-FPGA-Verilog] nios

Description: altera ep2c8V2 开发实例 timer uart I2C key interrupt 等-altera ep2c8V2 examples timer uart I2C key interrupt etc.
Platform: | Size: 11765760 | Author: chris | Hits:

[Software Engineering] SOPC_Nios

Description: Altera SOPC Builder 提供了 Nios Ⅱ处理器及一些常用外设接口 ,但并没有提供 12864 液晶模块的接口及驱动。-Altera SOPC Builder provides the Nios Ⅱ peripheral processor and a number of commonly used interface, but did not provide 12864 LCD module and the drive interface.
Platform: | Size: 356352 | Author: 夏飞 | Hits:

[VHDL-FPGA-Verilog] analogue-digi-ana-converter

Description: design and implementation of a format conversion system on the Altera NIOS board(QUARTUS) which reads an analogue input, converts it into digital data, and then does the reverse conversion back into analogue format. This will be done by taking an analogue an analogue input using SPI MCP3202 12-Bit A/D converter to generate the digital data stream and then the digital data will be used to generate an analogue output using Analog Devices 8-bit SPI AD7303 D/A converter.
Platform: | Size: 1398784 | Author: ak | Hits:

[Software Engineering] Altera_Proj

Description: altera nios ii ide c code
Platform: | Size: 8522752 | Author: himanshu | Hits:

[VHDL-FPGA-Verilog] DE2_EP2C35

Description: EP2C35开发板官方原理图,是altera的官方资料。是fpga电路设计的很好参考典范。-EP2C35 official development board schematics, is altera of official information. Fpga circuit design is a good reference model.
Platform: | Size: 351232 | Author: ami | Hits:

[VHDL-FPGA-Verilog] 9927416JpegDecoder

Description: altera nios处理器快速入门，对研究NIOS的人员很有帮助-altera nios processor, quick start, the staff very helpful for research NIOS
Platform: | Size: 365568 | Author: mstar | Hits:

[Other] altera_nios_starter_to_well_up

Description: 经典NIOS教程altera nios从入门到精通.pdf-altera nios starter to well up!!
Platform: | Size: 2936832 | Author: asdfa | Hits:

[VHDL-FPGA-Verilog] nios_net716UDP_nic

Description: 在Altera nios上用rtl8019实现UDP通信-altera nios rtl8019 udp
Platform: | Size: 17098752 | Author: 邓卓健 | Hits:

[VHDL-FPGA-Verilog] SPI

Description: design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip’s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board. The sampling frequency is 20kHZ. Use a potentiometer.-design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip' s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board . The sampling frequency is 20kHZ. Use a potentiometer.
Platform: | Size: 1024 | Author: weichenghao | Hits:

[VHDL-FPGA-Verilog] Nios

Description: altera fpga的nios经典教材-altera fpga s classic textbook about nios
Platform: | Size: 3614720 | Author: bentley | Hits:
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